Electronic circuits are simulated during the design process for purposes of verifying correct behavior and debugging the design if errors are found. The data generated during simulation of the design is typically depicted with a wave form viewer. A waveform viewer generally shows how the value of a signal changes relative to clock cycles during the simulation. The information provided by the waveform viewer is helpful and perhaps necessary to tracing the source of a problem in a design. Debugging the design may require measurement of signal latency and determining the flow and effect of data through the system. However, cross-referencing the signals and relating signal values in a waveform viewer to the logic blocks of the design may be challenging and time-consuming.
The present invention may address one or more of the above issues.